DAQ Diagnostic Utility Version 2.0 Readme

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The National Instruments DAQ Diagnostic Utility Readme includes the following sections:

Getting Started with the DAQ Diagnostic Utility

This utility tests the counter, analog input, analog output, and digital I/O systems of supported multifunction DAQ devices to ensure that they function within tolerance.

Caution  To test the device, the DAQ Diagnostic Utility reads and writes from various analog and digital lines. To prevent inadvertent operation of external hardware, disconnect the cable from your device before continuing. This utility also performs a device reset on supported DAQ devices. Close all other applications that access the device before starting the utility.

Requirements

To use the DAQ Diagnostic Utility, you need the following:

How to Use the DAQ Diagnostic Utility

To begin testing your device, complete the following steps:

  1. Open the DAQ Diagnostic Utility.
  2. Select your device from the drop-down list.
  3. Click Begin Diagnostic Utility to start the series of tests.

Tests Performed by the DAQ Diagnostic Utility

The DAQ Diagnostic Utility performs a series of tests to verify the basic operations are within the specified tolerances.

Device Detection
This test verifies the driver and hardware installation by resetting the device and reading various attributes. To pass this test, the device must be properly installed and configured in Measurement & Automation Explorer (MAX). If NI-DAQmx 7.5 or later is not installed, the device does not pass this test and the DAQ Diagnostic Utility stops. If the device is not supported by this utility, testing is aborted.

Calibration
The DAQ Diagnostic Utility prompts you to perform a self-calibration before it begins testing the various subsystems. NI recommends that you execute this self-calibration; however, it is not required to complete the DAQ Diagnostic Utility. Periodic self-calibration helps to keep measurements accurate and reliable. Environmental factors, such as changes in humidity or temperature, can cause drifting in measurements.

Counter Tests

The following tests verify the basic operation of the counter/timer circuitry.

– CTR Buffered Pulse
This test generates a continuous pulse train with one counter and measures the pulse train using buffered pulse width measurements on the other counter. A range of pulse widths are tested. To pass this test, the average of the measurements must lie within a specified tolerance of the requested pulse width.

– Single Pulse Generation
This test generates a single pulse with one counter and measures the pulse with the other counter. A range of pulse widths are tested. To pass, each pulse width measurement must lie within a specified tolerance of the requested pulse width.

Note  These counter tests are performed only on counters 0 and 1. If your device contains additional counters, those are not tested.

Analog Input Tests

– AI Ground Reference
This test verifies the basic operation of the analog input circuitry by taking single-point measurements of the internal ground reference voltage. Every gain setting supported by the device is tested. To pass, each measurement must lie within a voltage range that depends on the code width of the device at the particular gain setting.

– AI Voltage Reference
This test verifies the basic operation of the analog input circuitry by taking single-point measurements of the internal voltage reference. Every applicable gain setting supported by the device is tested. To pass, each measurement must lie within a voltage range that depends on the code width of the device at the particular gain setting.

– AI Finite Sample Clock
This test verifies the operation of the analog input timing circuitry by performing a finite buffered acquisition. The number of sample and convert clock pulses are measured using counters. Readings are taken from a variable number of analog input channels up to the total number of analog input channels for the device. To pass, the number of sample clock pulses must equal the number of samples per channel specified, and the number of convert clock pulses must equal the number of samples per channel multiplied by the number of channels in the scan list.

– AI Finite Sample Clock Frequency
This test verifies the operation of the analog input timing circuitry by performing a finite buffered acquisition. The sample clock frequency is measured by the counters. To pass, the sample clock frequency measured by the counters must lie within a specified tolerance of the requested sample clock frequency.

Analog Output Tests

– AO Finite Sample Clock
This test verifies the operation of the analog output timing circuitry by performing a finite buffered waveform generation. The number of AO sample clock pulses is measured using a counter. A range of waveform lengths are tested. To pass, the number of AO sample clocks measured by the counter must be equal to the number of points specified in the finite generation.

– AO Finite Sample Clock Frequency
This test verifies the operation of the analog output timing circuitry by performing a finite buffered waveform generation. The AO sample clock frequency is measured using counters. A range of AO sample clock frequencies is tested. To pass, the AO sample clock frequency measured by the counters must lie within a specified tolerance of the requested AO sample clock rate.

– AO Single Point
This test verifies the basic operation of the analog output circuitry by generating single-point voltages and internally reading them back. A range of voltages is tested. To pass, each measurement must lie within a voltage range that depends on the analog input code width.

– AO Accuracy
This test verifies the operation of the analog output circuitry by performing a finite buffered waveform generation of a sine wave pattern. The voltage is internally read back using the AO sample clock to time the acquisition. To pass, the average error of all measurements must be less than a specified tolerance.

Digital I/O Tests

– DIO Lines
This test verifies the operation of the digital I/O circuitry by performing line input and output. A Boolean value is written to each digital line and then internally read back. Both True and False values are tested. To pass, each value read must match the value written. If the digital lines support tristating, the test will verify the tristated line is at the appropriate level.

– DIO Ports
This test verifies the operation of the digital I/O circuitry by performing port output and input. A binary pattern of walking 1s and 0s is written to each digital port and then internally read back. To pass, each pattern read must match the pattern written.

Device Support

If your device does not appear in one of the following lists, it may be because your device is newer than the current version of the DAQ Diagnostic Utility. Although the test may appear to run properly, the results could be inaccurate.

Supported Devices

Unsupported Devices

Note  Any device NOT supported in NI-DAQmx is not supported by the DAQ Diagnostic Utility